Design&Test Editorial Board | IEEE Council on Electronic Design Automation

Design&Test Editor-in-Chief

Partha Pratim Pande

Washington State University

United States

6 (Western U.S.)

Design&Test Associate Editor-in-Chief

Mehdi Tahoori

Karlsruhe Institute of Technology

Germany

8 (Africa, Europe, Middle East)

Design&Test Cover Design

Technical Areas: Keynotes

Mehdi Tahoori

Karlsruhe Institute of Technology

Germany

8 (Africa, Europe, Middle East)

Interconnect

Sudeep Pasricha

Colorado State University

United States

5 (Southwestern U.S.)

Sudeep Pasricha

5 (Southwestern U.S.)

Biography

Sudeep Pasricha is a Walter Scott Jr. College of Engineering Professor in the Department of Electrical and Computer Engineering, the Department of Computer Science, and the Department of Systems Engineering at Colorado State University. He is Director of the Embedded, High Performance, and Intelligent Computing (EPIC) Laboratory and the Chair of Computer Engineering. His research efforts span multiple computing scales, from computing chips to embedded/IoT/cyber-physical systems and high performance datacenters. Specific search focus areas include: 1) electronic design automation (EDA) and architectures for emerging manycore computing (silicon photonic and advanced electronic network-on-chip design, memory architectures, resource management, 3D ICs); 2) energy-efficient, secure, fault-tolerant, and real-time embedded and IoT systems, (across the domains of automotive, medical, and mobile applications); and 3) resource management for high performance computing (exascale datacenters and supercomputers).

Prof. Pasricha received the B.E. degree in Electronics and Communication Engineering from Delhi Institute of Technology, India, in 2000, and his Ph.D. in Computer Science from the University of California, Irvine in 2008. He joined Colorado State University (CSU) in 2008. Prior to joining CSU, he spent several years working in STMicroelectronics and Conexant Inc. His research focuses on the design of innovative software algorithms, hardware architectures, and hardware-software co-design techniques for energy-efficient, fault-tolerant, real-time, and secure computing. He has co-authored seven books, multiple patents, and published more than 300 research articles in peer-reviewed journals and conferences, workshops, and books. He has given multiple invited keynotes at IEEE and ACM conferences on a variety of topics that span optical computing, AI acceleration with silicon photonics, machine learning for IoT applications, sustainable datacenters, and robust chip-scale networks.

Prof. Pasricha has received 17 Best Paper Awards and Nominations at various IEEE and ACM conferences, including at DAC, ASPDAC, NOCS, GLSVLSI, IGSC, SLIP, AICCSA, and ISQED. Other notable awards include: 2022 ACM Distinguished Speaker, 2019 George T. Abell Outstanding Research Faculty Award, the 2016-2018 University Distinguished Monfort Professorship, 2016-2019 Walter Scott Jr. College of Engineering Rockwell-Anderson Professorship, 2018 IEEE-CS/TCVLSI mid-career research Achievement Award, the 2015 IEEE/TCSC Award for Excellence for a mid-career researcher, the 2014 George T. Abell Outstanding Mid-career Faculty Award, and the 2013 AFOSR Young Investigator Award. His research has been funded by various sponsors including NSF, SRC, AFOSR, DOE, ORNL, DoD, Fiat-Chrysler, HPE, and NASA. He has served as General Chair and Program Committee Chair for multiple IEEE and ACM conferences, and also served in the Editorial board of multiple IEEE and ACM journals. He is a Fellow of the IEEE, Fellow of AAIA, Distinguished Member of the ACM, and an ACM Distinguished Speaker.

Affiliation(s)

Colorado State University

United States

Hiroki Matsutani

Keio University

Japan

Reliability

Sanghamitra Roy

Utah State University

United States

6 (Western U.S.)

Real-Time & Mixed Critically

Jian-Jia Chen

University of Dortmund

Germany

8 (Africa, Europe, Middle East)

Security & Trust

Ramesh Karri

New York University

United States

1 (Northeastern U.S.)

Ramesh Karri

1 (Northeastern U.S.)

Biography

Ramesh Karri is a Professor of Electrical and Computer Engineering at Tandon School of Engineering, New York University. He has a Ph.D. in Computer Science and Engineering, from the University of California at San Diego. His research and education activities span hardware cybersecurity including trustworthy ICs, processors and cyber-physical systems; security-aware computer-aided design, test, verification, validation and reliability; nano meets security; metrics; benchmarks; hardware cybersecurity competitions; additive manufacturing security.

He has over 200 journal and conference publications including tutorials on Trustworthy Hardware in IEEE Computer (2) and Proceedings of the IEEE (5). His groups work on hardware cybersecurity was nominated for best paper awards (ICCD 2015 and DFTS 2015) and received awards at conferences (ITC 2014, CCS 2013, DFTS 2013 and VLSI Design 2012) and at competitions (ACM Student Research Competition at DAC 2012, ICCAD 2013, DAC 2014, ACM Grand Finals 2013, Kaspersky Challenge and Embedded Security Challenge).

He was the recipient of the Humboldt Fellowship and the National Science Foundation CAREER Award. He is the area director for cybersecurity of the NY State Center for Advanced Telecommunications Technologies at NYU-Poly; Co-founded the NYU Center for CyberSecurity -CCS (cyber.nyu.edu), co-founded the Trust-Hub (trust-hub.org/) and founded and organizes the Embedded Security Challenge, the annual red team blue team event at NYU, (www.nyu.edu/csaw2016/csaw-embedded).

He co-founded the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH). He served as program/general chair of conferences including IEEE International Conference on Computer Design (ICCD), IEEE Symposium on Hardware Oriented Security and Trust (HOST), IEEE Symposium on Defect and Fault-Tolerant Nano VLSI Systems (DFTS) NANOARCH, RFIDSEC 2015 and WISEC 2015. He serves on several program committees (DAC, ICCAD, HOST, ITC, VTS, ETS, ICCD, DTIS, WIFS).

He was the Associate Editor of IEEE Transactions on Information Forensics and Security (2010-2014), IEEE Transactions on CAD (2014-present), ACM Journal of Emerging Computing Technologies (2007-present), ACM Transactions on Design Automation of Electronic Systems (2014-present), IEEE Access (2015-present), IEEE Transactions on Emerging Technologies in Computing (2015-present), IEEE Design and Test (2015-present) and IEEE Embedded Systems Letters (2016-present). He served as an IEEE Computer Society Distinguished Visitor (2013-2015). He is on the Executive Committee of IEEE/ACM Design Automation Conference initiating and leading the Security@DAC initiative (2014-2017). He has delivered invited keynotes, talks, and tutorials on Hardware Security and Trust (ESRF, DAC, DATE, VTS, ITC, ICCD, NATW, LATW, CROSSING etc).

Affiliation(s)

New York University

United States

Kanad Basu

UT Dallas

5 (Southwestern U.S.)

Fareena Saqib

University of North Carolina at Charlotte

United States

Self-Aware & Adaptive Systems

Axel Jantsch

Vienna University of Technology

Austria

6 (Western U.S.)

Laura Pozzi

University of Lugano

Switzerland

8 (Africa, Europe, Middle East)

Test & Verification Techniques

Vivek Chickermane

Cadence Design Systems

United States

5 (Southwestern U.S.)

Vivek Chickermane

5 (Southwestern U.S.)

Biography

Vivek Chickermane is a Distinguished Engineer at Cadence Design Systems where he is also a Senior Group Director for R&D in the Modus DFT Software group which is a part of Cadence’s Digital Systems Group. His professional responsibilities include design and productization of in-system DFT features that are used in high quality and safety-critical applications. He has been involved in the frontlines of productizing key DFT features such as OPMISR Compression technology in 2001, IEEE 1149.6 (AC-JTAG) in 2004, IEEE 1500 Core Test Wrapper synthesis in 2005, development of the first EDA Common Power Format (CPF) in 2008 which could be used by all tools in an RTL to GDS2 including power-aware test. His team’s contributions to power-aware test led to a “Best In Test Award” in 2008 from Test and Measurement World Magazine. More recently he and his team have productized low-pin count compression, 3D IC DFT, Hierarchical Test Compression using pattern porting, IEEE 1687 (iJTAG) and physically-aware 2D Compression to reduce the cost of test. Prior to Cadence, Dr. Chickermane was at IBM’s Microelectronics Division where he led the development of the first DFT Synthesis tool in their BooleDozer Synthesis tool which was used in the front-end of their vector-less ASIC sign-off flow. Dr Chickermane has published more than 80 technical refereed technical articles and papers and is also a co-inventor of more than 40 US patents awarded or pending. He serves on several IEEE conference and standards committees and is currently an Associate Editor of IEEE Design & Test. He received his B.Tech in Electrical Engineering from Indian Institute of Technology, New Delhi and his M.S and Ph.D degrees in Computer Engineering from the Univ. of Illinois at Urbana-Champaign.

Affiliation(s)

Cadence Design Systems

United States

Fei Su

Intel Corp.

United States

6 (Western U.S.)

Rubin A Parekhji

Texas Instruments

India

Analog, Asynchronous & Mixed Signal

Haralampos Stratigopoulos

Sorbonne Universités, CNRS

France

8 (Africa, Europe, Middle East)

Haralampos Stratigopoulos

8 (Africa, Europe, Middle East)

Biography

Haralampos-G. Stratigopoulos (S’02–M’07) received the Diploma degree in electrical and computer engineering from the National Technical University of Athens, Athens, Greece, in 2001, and the Ph.D. degree in electrical engineering from Yale University, New Haven, CT, USA, in 2006.,From 2007 to 2015, he was a Researcher with the French National Center for Scientific Research (CNRS) at TIMA Laboratory, Grenoble, France. From 2015, he is a Researcher with the CNRS at LIP6 Laboratory, Paris, France. His current research interests include design-for-test and built-in test for analog, mixed-signal, RF circuits and systems, computer-aided design, machine learning, and hardware security.

Dr. Stratigopoulos was a recipient of the Best Paper Award in 2009, 2012, and 2015 IEEE European Test Symposium (ETS). He was the General Chair of the 2015 IEEE International Mixed-Signal Testing Workshop and the Program Chair of the 2017 IEEE ETS. He has served on the Technical Program Committees of the Design, Automation, and Test in Europe Conference, the IEEE International Conference on Computer-Aided Design, the IEEE VLSI Test Symposium, the IEEE ETS, the IEEE International Test Conference, and several others international conferences. He is an Associate Editor of the Journal of Electronic Testing: Theory and Applications (Springer), the IEEE Design and Test Magazine, and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Affiliation(s)

Sorbonne Universités, CNRS

France

Shreyas Sen

Purdue University

United States

4 (Central U.S.)

Shreyas Sen

4 (Central U.S.)

Biography

Dr. Shreyas Sen received his Ph.D. degree in Electrical and Computer Engineering from Georgia Tech, Atlanta, USA, in 2011. He is currently an Assistant Professor in School of Electrical and Computer Engineering, Purdue University. He has over 5 years of industry research experience at Intel Labs, Qualcomm and Rambus. His research interests include mixed-signal circuits/systems for Internet of Things (IoT), Biomedical and Security. He has authored/co-authored 2 book chapters, over 100 conference and journal papers and has 13 patents granted/pending. In 2018, Dr. Sen was chosen by MIT Technology Review as one of the top 10 Indian Inventors Worldwide under 35 (MIT TR35 India Award), for the invention of using the Human Body as a Wire, which has the potential to transform healthcare, neuroscience and human-computer interaction. Dr. Sen is a recipient of the AFOSR Young Investigator Award 2017, NSF CISE CRII Award 2017, Google Faculty Research Award 2017, Intel Labs Divisional Recognition Award 2014 for industry-wide impact on USB-C type, Intel PhD Fellowship 2010, IEEE Microwave Fellowship 2008, GSRC Margarida Jacome Best Research Award 2007, Best Paper Awards at HOST 2017 and 2018, ICCAD Best-in-Track Award 2014, VTS Honorable Mention Award 2014, RWS Best Paper Award 2008, Intel Labs Quality Award 2012, SRC Inventor Recognition Award 2008 and Young Engineering Fellowship 2005. He serves/has served as an Associate Editor for IEEE Design & Test, Executive Committee member of IEEE Central Indiana Section, ETS and Technical Program Committee member of DAC, CICC, DATE, ISLPED, ICCAD, ITC, VLSI Design, IMSTW and VDAT. Dr. Sen is a Senior Member of IEEE.

Affiliation(s)

Purdue University

United States

Low Power Systems

Somnath Paul

Intel

United States

Deep-Submicron Design, DFM & Yield

Jennifer Dworak

Southern Methodist University

United States

5 (Southwestern U.S.)

Huawei Li

Institute of Computing Technology, CAS

China

10 (Asia and Pacific)

Embedded Software

Akash Kumar

Technische Universität Dresden

Germany

8 (Africa, Europe, Middle East)

Akash Kumar

8 (Africa, Europe, Middle East)

Biography

On 29 September 2015, the native of India scientist Akash Kumar received the certificate of appointment from the Technical University of Dresden. The multiprocessor systems expert is now full professor of TU Dresden and the fourth appointed Strategic Professor of cfaed where he holds the Chair for Processor Design. In summer 2015, Prof. Kumar already spent a two-month research stay at TU Dresden. This period was a useful stepping stone for him to get familiar with his future workplace and to build up first scientific contacts and networks.

Akash Kumar received his Ph.D. degree in electrical engineering in the area of embedded systems from National University of Singapore (NUS) joint with Eindhoven University of Technology, Netherlands. From 2009, he was affiliated with the Department of Electrical and Computer Engineering at NUS and starting 2011 he worked there as an Assistant Professor. During that period, Prof. Kumar has published over 60 papers in leading international electronic design automation journals and conferences.

The focus of his current research lays on designing predictable multi‐processor systems – predictable in terms of both the architecture and the applications. Multiprocessor systems‐on‐chip (MPSoCs) have been proposed as a solution to rising power of modern embedded systems. These systems are becoming increasingly heterogeneous with use of dedicated IP blocks and application domain specific processors. To achieve high performance in such systems, the limited computational resources must be shared. The concurrent execution of dynamic applications on shared resources is a potential source of interference. Modelling and analyzing this interference is a key to building cost‐effective systems which can deliver the desired performance of the applications.

Affiliation(s)

Technische Universität Dresden

Germany

Chengmo Yang

University of Delaware

United States

2 (Eastern U.S.)

Memories

Said Hamdioui

Delft University of Technology

Netherlands

8 (Africa, Europe, Middle East)

Said Hamdioui

8 (Africa, Europe, Middle East)

Biography

Said Hamdioui (M’99–SM’11) received the M.S.E.E. and Ph.D. degrees (Hons.) from Delft University of Technology, Delft, The Netherlands, in 1997 and 2001, respectively.

He was at Intel Corporation, Santa Clara, CA, USA, Philips Semiconductors Research and Development, Crolles, France, and Philips/NXP Semiconductors, Nijmegen, The Netherlands. He is a Professor at Delft University of Technology. He is currently the Chair Professor on Dependable and Emerging Computer Technologies and the Head of the Computer Engineering Laboratory, Delft University of Technology. He has authored or co-authored one book and contributed to two others. He has co-authored over 180 conference and journal papers. He holds two patents. His current research interests include dependable CMOS nano computing, including reliability, testability, hardware security and emerging technologies and computing paradigms, including 3-D stacked ICs, memristors for logic and storage, in-memory-computing. He has consulted for many companies. He delivered dozens of keynote speeches, distinguished lectures, and invited presentations and tutorials at major international forums/conferences/schools and at leading semiconductor companies.

Dr. Hamdioui is a member of AENEAS/ENIAC Scientific Committee Council. He is an Associate Editor of the IEEE Transactions on Very Large Scale Integration ( VLSI) Systems. He serves on the Editorial Board for IEEE Design and Test, the Elsevier Microelectronic Reliability Journal, and the Journal of Electronic Testing: Theory and Applications.

Affiliation(s)

Delft University of Technology

Netherlands

Abu Sebastian

Research Staff Member

IBM Research - Zurich

Switzerland

8 (Africa, Europe, Middle East)

Abu Sebastian

8 (Africa, Europe, Middle East)

Biography

Abu Sebastian received a B. E. (Hons.) degree in Electrical and Electronics Engineering from BITS
Pilani, India and M.S. and Ph.D. degrees in Electrical Engineering (minor in Mathematics) from Iowa
State University. Since 2006, he is a Research Staff Member at IBM Research - Zurich in Rüschlikon,
Switzerland. He was a contributor to several key projects in the space of storage and memory
technologies and currently manages the research effort on in-memory computing at IBM Research -
Zurich. He also serves on the leadership team of the IBM AI Hardware Center, headquartered in
Albany, NY. He has published over 180 articles in journals and conference proceedings. He also holds
over 50 granted patents.
Dr. Sebastian is a co-recipient of the 2009 IEEE Control Systems Technology Award and the 2009 IEEE
Transactions on Control Systems Technology Outstanding Paper Award. In 2013 he received the IFAC
Mechatronic Systems Young Researcher Award for his contributions to the field of mico-/nanoscale
mechatronic systems. In 2015 he was awarded the European Research Council (ERC) consolidator
grant and in 2020, he was awarded an ERC Proof-of-concept grant. He is an IBM Master Inventor
since 2016. He was named Principal and Distinguished Research Staff Member in 2018 and 2020,
respectively. In 2019 he received the Ovshinsky Lectureship Award for his contributions to "Phase-
change materials for cognitive computing".

Affiliation(s)

Research Staff Member

IBM Research - Zurich

Switzerland

Multicores

Umit Ogras

Arizona State University

United States

Hemangee Kapoor

IITG

India

SoC & 3D

Jin-Fu Li

National Central University

Taiwan

10 (Asia and Pacific)

Jin-Fu Li

10 (Asia and Pacific)

Biography

Jin-Fu Li received the B.S. degree from the Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan, R.O.C., in 1995, and the M.S. and Ph.D. degrees, both from the Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, R.O.C., in 1999 and 2002, respectively.

Since 2002, he has been with the Department of Electrical Engineering, National Central University (NCU), Taoyuan, Taiwan, R.O.C., where he is currently a Full Professor and the Chairman. From July 2006 to May 2007, he also was a Visiting Scholar with the ECE Department, University of California, Santa Barbara (UCSB). He served as a Vice-Chairman of the Department of Electrical Engineering, NCU from August 2010 to July 2013. His research interests include advanced very large scale integration (VLSI)/SOC design and test, memory testing and repair, reliable VLSI circuits and systems, and 3D IC architecture design and test.

Dr. Li was a recipient of the Industry Academy Collaboration Award from Taiwan Ministry of Education (MOE) in 2003, the PhD Thesis Award from Taiwan IC Design (TICD) Society in 2003, the Taiwan Merit Scholarship from the University-Based Program of MOE in 2005, the Best Mentor Teacher Award from National Central University (NCU) in 2008 and 2011, the College-Level Distinguished Teaching Award from NCU in 2011, the Outstanding Research Award from NCU from 2008 to 2013, the Excellent Young Electrical Engineer Award from the Chinese Institute of Electrical Engineering, Taiwan, in 2008, the Distinguished Young Scholar Award from the TICD Society in 2010, the 2013 IEEE VLSI Test Symposium Best Special Session Award from TTTC, IEEE Computer Society. He has served the organization or technical program committees of several IEEE conferences. He is a member of the IEEE and the IEEE Computer Society. He is also a life member of the Chinese Institute of Electrical Engineering and TICD Society.

Affiliation(s)

National Central University

Taiwan

Lorena Anghel

University Grenoble-Alps

France

Things & Systems of Systems

Paul Bogdan

University of Southern California

United States

6 (Western U.S.)

Emerging Technologies & Devices

Yiran Chen

Professor in the Department of Electrical and Computer Engineering

Duke University

United States

3 (Southeastern U.S.)

Yiran Chen

3 (Southeastern U.S.)

Biography

Yiran Chen received B.S and M.S. from Tsinghua University and Ph.D. from Purdue University in 2005. After five years in industry, he joined the University of Pittsburgh in 2010 as Assistant Professor and then promoted to Associate Professor with tenure in 2014, held Bicentennial Alumni Faculty Fellow. He now is a tenured Associate Professor of the Department of Electrical and Computer Engineering at Duke University and serving as the director of NSF Industry–University Cooperative Research Center (IUCRC) for Alternative Sustainable and Intelligent Computing (ASIC) and co-director of Duke Center for Evolutionary Intelligence (CEI), focusing on the research of new memory and storage systems, machine learning and neuromorphic computing, and mobile computing systems.

Dr. Chen has published one book and more than 350 technical publications and has been granted 93 US patents. He serves or served the associate editor of several IEEE and ACM transactions/journals and served on the technical and organization committees of more than 50 international conferences. He received 6 best paper awards and 12 best paper nominations from international conferences. He is the recipient of NSF CAREER award and ACM SIGDA outstanding new faculty award. He is a Fellow of the IEEE and Distinguished Member of ACM, a distinguished lecturer of IEEE CEDA, and the recipient of the Humboldt Research Fellowship for Experienced Researchers.

Affiliation(s)

Professor in the Department of Electrical and Computer Engineering

Duke University

United States

Physical Design

David Pan

University of Texas at Austin

United States

5 (Southwestern U.S.)

David Pan

5 (Southwestern U.S.)

Biography

David Z. Pan is a Professor and holder of Silicon Laboratories Endowed Chair at the Department of Electrical and Computer Engineering, The University of Texas at Austin. His research interests include bidirectional AI and IC interactions, electronic design automation, design for manufacturing, hardware security, and CAD for analog/mixed-signal ICs and emerging technologies. He has published over 400 refereed journal/conference papers and 8 US patents. He has served in many journal editorial boards and conference committees, including various leadership roles such as ICCAD 2019 General Chair, ASP-DAC 2017 TPC Chair, and ISPD 2008 General Chair. He has received many awards, including SRC Technical Excellence Award, 19 Best Paper Awards (ISPD 2020, ASP-DAC 2020, DAC 2019, GLSVLSI 2018, VLSI Integration 2018, HOST 2017, SPIE 2016, ISPD 2014, ICCAD 2013, ASP-DAC 2012, ISPD 2011, IBM Research 2010 Pat Goldberg Memorial Best Paper Award in CS/EE/Math, ASP-DAC 2010, DATE 2009, ICICDT 2009, SRC Techcon in 1998, 2007, 2012 and 2015), DAC Top 10 Author Award in Fifth Decade, ASP-DAC Frequently Cited Author Award, Communications of ACM Research Highlights, ACM/SIGDA Outstanding New Faculty Award, NSF CAREER Award, IBM Faculty Award (4 times), and many international CAD contest awards. He has graduated 35 Ph.D. students who have won many awards, including First Place of ACM Student Research Competition Grand Finals (twice, in 2018 and 2021), ACM/SIGDA Student Research Competition Gold Medal (x3), ACM Outstanding Ph.D. Dissertation in EDA Award (x2), and EDAA Outstanding Dissertation Award (x2). He is a Fellow of IEEE and SPIE.

Affiliation(s)

University of Texas at Austin

United States

Zhiru Zhang

Cornell University

United States

2 (Eastern U.S.)

ML for EDA

Theo Theocharides

University of Cyprus

Cyprus

8 (Africa, Europe, Middle East)

Theo Theocharides

8 (Africa, Europe, Middle East)

Biography

I am an Associate Professor in the Electrical and Computer Engineering Department, of the University of Cyprus.

My research revolves around the design of reliable and low power embedded and application-specific processors, media and computer vision hardware architectures and real-time digital artificial intelligence applications, geared towards edge-based, resource-constrained scenarios. My main interests lie in the fields of vision for autonomous terrestrial and aerial robotics (drones), and acceleration of deep learning algorithms for IoT applications such as distributed sensor networks, wearable sensors, smart infrastructures, etc. Furthermore, I am interested in acceleration of big data applications such as bioinformatics (proteomics and genomics) using heterogeneous computing platforms and reconfigurable hardware.

I am the director of the Embedded and Application Specific Systems-on-Chip Laboratory, and a faculty member and Director of Research of the KIOS Research and Innovation Center of Excellence. My lab's current research focuses on the development of low-power and reliable on-chip application-specific architectures, low-power VLSI design, embedded systems design and exploration of energy-reliability trade-offs for Systems on Chip and Embedded Systems. Our focus lies on acceleration of computer vision and artificial intelligence algorithms in hardware and low-power embedded processors suitable for edge intelligence, and in utilizing reconfigurable hardware towards self-aware, evolvable computing systems. Our research interests span also across the emerging areas of evolvable hardware design, and perceptual computing.

I serve on several organizing and technical program committees of various conferences, and I am a Senior Member of the IEEE, a member of the ACM, and an Associate Editor for IEEE Consumer Electronics magazine and the ETRI Journal. I also serve on the Editorial Boards of IEEE Design & Test magazine, and ACM Transactions on Embedded Computing Systems.

I am currently the editor of the Test Technology Technical Council newsletter for the IEEE Design & Test of Computers, for which I also serve as the Information Editor. I am also editing the newsletter for the Journal of Electronic Testing. If you wish to submit a TTTC-sponsored event for publication into an upcoming IEEE D&T or JETTA, please email me with the details.

Affiliation(s)

University of Cyprus

Cyprus

Jana Doppa

Washington State University

United States

Mohammad Shafique

NYU, Abu Dhabi

United Arab Emirates

Quantum Computing

Robert Wille

Technical University of Munich

Germany

8 (Africa, Europe, Middle East)

Robert Wille

8 (Africa, Europe, Middle East)

Biography

Robert Wille is a Full and Distinguished Professor at the Technical University of Munich, Germany, and Chief Scientific Officer at the Software Competence Center Hagenberg GmbH, Austria.

From 2002 to 2006, Robert Wille studied Computer Science (Diploma) at the University of Bremen. After successfully completing his doctorate in 2009 (summa cum laude), he worked as a postdoc at the University of Bremen and, since 2013, as a Senior Researcher in the Cyber-Physical Systems department of the German Research Center for Artificial Intelligence (DFKI). Besides that, he served as a lecturer at the University of Applied Science Bremen from 2010 to 2012 and was a guest professor at the University of Potsdam in 2012 as well as the Technical University of Dresden in 2013/2014. From 2015 to 2022, he was Full Professor at the Johannes Kepler University Linz and head of the Institute for Integrated Circuits (at the age of 32 and as one of the youngest full professors in the field). In 2019, he founded the LIT Secure and Correct Systems Lab at JKU, and, in 2020, he additionally became Chief Scientific Officer at the Software Competence Center Hagenberg GmbH. Since 2022, he works in Munich---appointed through a "Leuchtturm"-procedure (i.e., direct appointment) and, additionally, through the "Distinguished Professorship"-program.

Robert Wille's expertise covers a broad spectrum of topics with a particular focus on the development of automatic methods for the design, simulation, verification, and test of complex systems in hard- and software. He considers conventional technologies (from formal specifications to the realization) as well as future technologies (including quantum computing, microfluidic biochips, field-coupled nanotechnologies, optical circuits, memristors, reversible circuits, and adiabatic circuits). Besides that, he frequently applies his expertise to complementary fields in cooperation with groups from other areas of Computer Science (e.g., Machine Learning, Software Development, Theoretical Computer Science, Database Systems, Operation Systems, and more) as well as Mechatronics and Electrical Engineering. Furthermore, his work on future technologies frequently exposes him to topics from physics, biology, chemistry, and optics. Also, projects with legal sciences are within his portfolio.

Since 2007, Robert Wille published more than 400 journal and conference papers in this area and was repeatedly awarded (e.g., with Best Paper Awards, e.g., at TCAD and ICCAD, an ERC Consolidator Grant, a Distinguished and a Lighthouse Professor appointment, a Google Research Award, and more). Besides that, he served as Associate Editor and Guest Editor for various renowned journals such as the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), the ACM Journal on Emerging Technologies in Computing Systems (JETC), or Springer’s Lecture Notes in Computer Science (LNCS). Additionally, he was General Chair and PC Chair for several conferences is Executive Committee Member for DATE and ICCAD, served in numerous Program Committees, and organized several tutorials, seminars, workshops, and special sessions.

For more details, please see https://www.cda.cit.tum.de/team/wille/.

Affiliation(s)

Technical University of Munich

Germany

Departments: Interviews

Nicola Nicolici

McMaster University

Canada

7 (Canada)

Currents Editor-in-Chief

Agnieszka Dubaj

Intel Corp.

United States

6 (Western U.S.)

DATC Newsletter

Joe Damore

IBM (retired)

United States

1 (Northeastern U.S.)

TTTC Newsletter

Stefano Di Carlo

Politecnico di Torino

Italy

Latin America Liaison

Perspectives

Mehdi Tahoori

Karlsruhe Institute of Technology

Germany

8 (Africa, Europe, Middle East)

Roundtables

Ramesh Karri

New York University

United States

1 (Northeastern U.S.)

Ramesh Karri

1 (Northeastern U.S.)

Biography

Affiliation(s)

New York University

United States

Tutorials

Swarup Bhunia

University of Florida

United States

3 (Southeastern U.S.)

Publicity

Ganapati Bhat

Washington State University

United States

Reports

The Road Ahead

Mike Kishinevsky

Intel

United States

D&T Steering Committee

L. Miguel Silveira

INESC-ID, IST, Universidade de Lisboa

Portugal

8 (Africa, Europe, Middle East)

Krishnendu Chakrabarty

Duke University

United States

3 (Southeastern U.S.)

Bruce Hecht

VG2PLAY

United States

Bruce Hecht

Biography

Bruce Hecht is with Analog Devices Global Operations & Technology where he applies over 25 years’ experience in from R&D through deployment of New Products and New Technologies in hardware, software, and systems engineering. Bruce’s focus is on the intersection of design, learning, and leadership and has successfully grown new product portfolios in instrumentation and industrial products, healthcare devices and systems, and automotive electronic and mechatronic systems.

From Montreal, Quebec, Canada, Bruce has founded software, hardware, and learning organizations. His entrepreneurial adventures have brought him to the Shad Valley program, the London International Youth Science Forum, and the Canadian Technology Accelerator (CTA) based at the Cambridge Innovation Center. He holds a Certified Achievement in Alliance Management from the Association of Strategic Alliance Professionals and a Certified Six Sigma Black Belt through the American Society for Quality. Bruce is a member of the Corporate Advisory Board for INCOSE and serves on several working groups including Product Line Engineering, Systems Security Engineering, and Systems Science.

Bruce is an IEEE Senior Member and has served as guest editor for the IEEE Journal of Solid-State Circuits. He is currently a member of the steering committee for the IEEE Design & Test Magazine. He has served in many conference roles, including the launch of the IEEE Future Leaders Forum, and serving as the Technical Program Committee Chair and General Chair of local and international conferences, including Bipolar/BiCMOS Technical Meeting (BCTM) at sites from Boston to Bordeaux. He is on the Leadership Boards for the IEEE EMBS, SSCS, Biometrics Council, and the IEEE Sensors Council.

Affiliation(s)

VG2PLAY

United States

Enrico Macii

Politecnico di Torino

Italy

8 (Africa, Europe, Middle East)

Yervant Zorian

Synopsys, Inc.

United States

10 (Asia and Pacific)

Yervant Zorian

10 (Asia and Pacific)

Biography

Dr. Yervant Zorian is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and several other symposia and workshops.

Dr. Zorian holds 35 US patents, has authored four books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia's National Medal of Science.

He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.