Aim and Scope
This IEEE Design & Test special issue explores the challenges posed by the design of VLSI nodes for Internet-of-Things (IoT) systems. VLSI IoT devices combine sensing, computation, and communication in physically small, low-power designs. This special issue seeks papers that explore the design space and design methods for VLSI IoT devices.
Topics of Interest:
• IoT node architectures
• Sensors and actuators for IoT
• Ultra-low power VLSI design for IoT
• Power system design for IoT nodes
• Real-time IoT devices
• Emerging technologies for IoT nodes
• IoT communication systems
• Design methodologies and tools for IoT-oriented circuit and system design
• Reliability of IoT VLSI
• Safety and security of IoT devices
Submission Guidelines:
Prospective authors should follow the submission guidelines for IEEE Design & Test. All manuscripts must be submitted electronically to IEEE Manuscript Central at https://mc.manuscriptcentral.com/dandt. Indicate that you are submitting your article to the special issue on Circuits and Systems for VLSI IoT Devices. Submitted manuscripts must not have been previously published or currently submitted for publication elsewhere. Manuscripts must not exceed 5,000 words, including figures (with each average-size figure counting as 200 words) and a maximum of 12 references (50 for surveys). This amounts to about 4,000 words of text and a maximum of five small to medium figures. Accepted articles will be edited for clarity, structure, conciseness, grammar, passive to active voice, logical organization, readability, and adherence to style. Please see IEEE Design & Test Author Resources at http://www.ieee.org/publications_standards/publications/authors/magazines.html to view links in Submission Guidelines Basics and Electronic Submission Guidelines and requirements.
Schedule:
• Manuscripts due: 15 June 2018
• Reviews completed: 15 August 2018
• Revisions due: 14 September 2018
• Final version due: 1 November 2018
• Publication: March/April 2019
Guest Editors:
Marilyn C Wolf ([email protected])
Dimitrios Serpanos ([email protected])
S. Raj Rajagopalan ([email protected])
