Electronic Design Process Symposium

EDPS 2018

Electronic Design Process Symposium

Description

The 2018 Electronic Design Process Symposium is the leading forum for advanced chip and systems development and CAD methodologies.

 

As we approach the end of Moore’s law scaling, innovative packaging techniques are becoming increasingly important as package, board and other system components drive significant cost reduction. Innovative and smart manufacturing methodologies and flows are also becoming increasingly important. Since algorithmic development is changing rapidly, smart manufacturing enabling reduced NRE and faster time to market are critical.

 

Among other things, datacenter applications require heightened cybersecurity. 3DIC chip stacking of host processor and accelerator avoids exposing the bus between them to cyber-attacks.  Implementation of machine and deep learning algorithms provide a higher level of defense against hacking.  Cybersecurity is also very critical in system designs such as the ones found in automotive applications.

 

Reliability at the system level as well as at the package and chip level is impacted by ESD and thermal issues. Guaranteed performance needs to take aging and power into account. Newer interconnect, changing communication protocols and the wide range of operating conditions for systems require enhanced reliability for power and signal interconnects.

 

Heterogeneous integration of chips in high-performance processes and chips in mature process nodes allows higher performance and better yield optimization. More flexible system level partitioning will lead the way to new products’ development. Architectural modularity and IP re-use will enable higher performance at lower total system cost. New FPGA methodologies, especially embedded FPGA will see extensive use.

 

And last but not the least, machine learning is permeating all fields of system design and design tools.

 

In this annual gathering of electronic IC/system designers and developers, we will discuss design methodologies, design flows and CAD tool needs via presentations or panel discussions.

 

For 2018, we are seeking presenters in the following areas

 

1.    Cyber Systems Design with emphasis on security

2.    Machine Learning in System Design and EDA

3.    Smart Manufacturing – Increased cooperation between design and manufacturing, Advanced Packaging, IoT, Machine Learning, Cloud manufacturing, Supply Chain Safety

4.    Innovative Designs and Design Techniques (incl. validation and debug)

5.    System reliability with special focus on ADAS and 5G

 

Please contact Shishpal Rawat ([email protected]) to submit abstract and discuss areas of mutual interest.  All presentations slides must be made available in final form by Aug 15, 2018.

 

Complete presentations from 2017 EDPS and previous years are available at:

 

http://edpsieee.ieeesiliconvalley.org/EDP2017/edps_program.php   


Date & Time

Thu, September 13, 2018 –
Fri, September 14, 2018

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Location

SEMI

673 Milpitas Blvd, Milpitas, CA 95035

673 Milpitas Blvd, Milpitas, CA 95035