IEEE CEDA Ernest S. Kuh Early Career Award

To recognize an individual who has made substantial contributions to the area of Electronic Design Automation in the early stages of his or her career.

Historical Background:

The IEEE CEDA Ernest S. Kuh Early Career Award honors an individual who has made innovative and substantial technical contributions to the area of Electronic Design Automation in the early stages of his or her career.

In the spring of 2015, the IEEE CEDA Board of Governors voted unanimously to approve the proposal to rename the IEEE CEDA Early Career Award to the "IEEE CEDA Ernest S. Kuh Early Career Award" in honor of the late Prof. Ernest S. Kuh, who made pioneering contributions to circuit theory, EDA, and engineering education.


About Ernest S. Kuh

Ernest S. Kuh was a professor emeritus and dean of the UC Berkeley College of Engineering from 1973 to 1980. Professor Kuh passed away on 27 June 2015.

Ernest S. Kuh joined the Berkeley faculty in 1956 and made pioneering contributions to circuit theory, EDA of integrated circuits, and engineering education.

Ernest S. Kuh mentored and supervised several generations of graduate students who today occupy leadership positions in academia and industry.

Ernest S. Kuh was a Fellow of IEEE and AAAS. He received numerous awards and honors, including the ASEE Lamme Medal, IEEE Centennial Medal, IEEE Education Medal, IEEE Circuits and Systems Society Award, IEEE Millennium Medal, the 1996 C&C Prize, and the 1998 EDAC/IEEE CEDA Phil Kaufman Award.

The award shall be based on contributions to the field of EDA. Contributions will be measured based on technical merit and creativity in performing research and will be assessed based on the published record of the individual and the references accompanying the nomination.

The award is intended to be equally available to contributors from academic and industrial institutions.

Prize:
$1,000 and an engraved plaque.
Funding:
The IEEE Council on Electronic Design Automation (CEDA).
Presentation:
The award will be presented at the ICCAD conference.
Basis for Judging:
The Award Committee will judge nominees according to their contributions to the field of EDA. Contributions will be measured based on technical merit and creativity in performing research and will be assessed based on the published record of the individual and the references accompanying the nomination. The award is intended to be equally available to contributors from academic and industrial institutions. Some of the specific criteria used will be: current and potential impact of the individual's contributions, as well as contributions to the profession at large
Eligibility:
Full members of the IEEE at any level (regular, senior, or fellow grades) whose highest educational degree has been awarded within 8 years of the date of nomination.
Nomination Details:

The nomination deadline is April 15.
 

Nomination Form:

Recipients

Pierluigi Nuzzo

"For outstanding contributions to high-assurance design of cyber-physical systems using contract-based design methodology.”

Bei Yu

For contributions to machine learning in physical design and design for manufacturability

Zheng Zhang

For contributions towards fundamental stochastic computation methods for circuit simulation and testing and beyond.


Jeyavijayan Rajendran

For contributions towards secure and trustworthy integrated circuits.

Yier Jin

For contributions to hardware security

Pierre-Emmanuel Gaillardon

For contributions to Electronic Design Automation targeting emerging logic and memory  technologies

Paul Bogdan

For contributions to network-on-chip interconnects for multi-core cyber-physical systems

Ayse Coskun

For sustained and outstanding contributions to energy-efficient system-level design, including temperature-aware design and management, 3D-stacked system design, and management of large-scale computing systems.

Mohammad Abdullah Al Faruque

For contributions to energy-efficient design of reliable embedded and cyber-physical systems

Zhiru Zhang

For outstanding contributions to algorithms, methodologies, and successful commercialization of high-level synthesis tools for FPGAs